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Re: [Full-disclosure] Cisco IOS Shellcode Presentation

Subject: Re: [Full-disclosure] Cisco IOS Shellcode Presentation
Date: Fri, 29 Jul 2005 17:10:12 -0400
On Fri, 29 Jul 2005 15:33:19 CDT, Randall Perry said:

Even for producing less than 500 units there are vendors ready to jump at the
chance to replace FPGA setups (because we are talking about complex 2k+ gate 
count).

More like 2M+ gate count.  Remember, you have to do BGP4 in silicon. ;)

Just give Oxford Semiconductor or AMI a call.

I don't think Oxford Semiconductor would be able to deal - looks like they're
mostly in the FireWire/USB arena.  AMI has a 2M gate part, but it has a top
clock speed of 100Mhz 
(http://www.amis.com/asics/structured_asics/XPressArray.html),
which would be borderline in the high-end routers....

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